What is new @ Fintronic ?

redball.gif (326 bytes)About Fintronic

redball.gif (326 bytes)What's new at Fintronic

redball.gif (326 bytes)What our customers are saying...

redball.gif (326 bytes)Support for Verilog 2001

redball.gif (326 bytes)Third party tools integrated with FinSim

home.htmlProductsSupportEvaluateContact



Fintronic Announces Super FinSim integrated with SystemC
    Business Editors/High-Tech Writers

    FOSTER CITY, Calif.--November 30th, 2005-- Fintronic USA, Inc., a leading provider of high-performance Verilog simulators announced support for mixed Verilog/SystemC models, starting with the release of Super FinSim 7_0_0, which is integrated with the OpenSource Initiative's SystemC simulator.

Dr. Alec Stanculescu, CEO and President of Fintronic USA, stated "SystemC is being used more and more by designers of complex circuits and we, at Fintronic USA, are pleased to offer our customers support for simulating mixed Verilog/SystemC models, featuring high speed integration, interface signals with up to 80,000 bits each, and a very simple usage procedure. We are also glad that the Verilog demos available on our WEB site for over 3 years, are running over 10x faster with Super FinSim 7_0_0 than with Super FinSim 6_2_09, the previously latest available version".

    ABOUT SUPER FINSIM

Super FinSim is a high performance, robust Verilog simulator, compatible with all the main players in the Verilog market.

Super FinSim's low memory requirement, proprietary swapping mechanism, compact results format, and support for separate compilation, make it ideal for use in large simulation farms.

    ABOUT SYSTEMC INTEGRATED WITH SUPER FINSIM

The use of mixed Verilog/SystemC models using Super FinSim and OSCI's SystemC simulator requires just the use of the foreign=SystemC attribute in Verilog modules to indicate that the body of the module is written in SystemC and the -sysc option at compilation to indicate that a SystemC file name follows on the command line.The use of the OSCI SystemC simulator is governed by the open source license agreement (https://www.systemc.org/web/sitedocs/open_source_licensing.html). Absolutely no warranty is made by Fintronic USA regarding the functionality or quality of the OSCI SystemC simulator.

More details regarding the simulation of mixed Verilog/SystemC descriptions by Super FinSim are presented on Fintronic's WEB site in section 5.4 of FAQ: http://fintronic.com/faqtoc.html, as well as in FinSim's User's Guide.

    ABOUT FINTRONIC USA

Fintronic USA, Inc.is a technology leader in high-performance Verilog Simulation. The company is committed to develop and deliver high performance simulators that enable customers to verify efficiently the functional and timing correctness of their most complex electronic system designs.

For more information on Fintronic USA, Inc. and its products, visit (www.fintronic.com), contact Dr Alec Stanculescu at (650) 349 0108, or send e-mail to info@fintronic.com.

    Note to Editors: FinSim is a registered trademark of Fintronic USA. All other brand or product names may be trademarks or registered trademarks of their respective companies and should be treated as such.